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0.01 ghz to 10 ghz, gaas, phemt, mmic, low noise amplifier data sheet hmc8410chips rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2016 analog device s, inc. all rights reserved. technical support www.analog.com features low noise figure: 1. 1 db typical high gain: 19.5 db typical high output third - order intercept (ip3) : 3 3 dbm typical die size: 0.95 mm 0.6 1 0.1 02 mm applications software defined radios electronics warfare radar applications functional block dia gram 2 rfout/v dd rfin/v gg 1 1 hmc8410chips 15093-001 figure 1 . general description the hmc8410chips is a gallium arsenide ( gaas ), monolithic microwave integrated circuit (mmic), pseudomorphic high electron mobility transistor ( phemt ) , low noise wideband ampli - fier that operates from 0.01 ghz to 10 ghz. the hmc8410chips provides a typical gain of 19.5 db , a 1.1 db typical noise figure, and a typical o utput ip3 of 33 dbm, requiring only 65 ma from a 5 v supply voltage. the saturated output power (p sat ) of 22.5 dbm enables the low noise amplifier (lna) to function as a local oscillator (lo) driver for many of analog devices, inc., balanced, i/q or image reject ion mixers. the hmc8410chips also features inputs/outputs (i/os) that are internally matched to 50 ?, making it ideal for surface - mounted technology (smt) - based, high capacity microwave radio applications.
hmc8410chips data sheet rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision h istory ............................................................................... 2 electrical specifications ................................................................... 3 0.01 ghz to 3 ghz frequency range ........................................ 3 3 ghz to 8 ghz frequency range ............................................. 3 8 ghz to 10 ghz frequency range ........................................... 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 interface schematics .....................................................................6 typical performance characteristics ..............................................7 theory of operation ...................................................................... 12 applications information .............................................................. 13 reco mmended bias sequencing .............................................. 13 mounting and bonding techniques for millimeterwave gaas mmics ......................................................................................... 13 application circuits ....................................................................... 15 assembly diagram ..................................................................... 15 outline dime nsions ....................................................................... 16 ordering guide .......................................................................... 16 revision history 10/ 2016 rev ision 0 : initial version
data sheet hmc8410chip s rev. 0 | page 3 of 16 specifications 0.01 gh z to 3 gh z frequency range t a = 25c, v dd = 5 v, and i dq = 65 ma , unless otherwise noted. table 1. parameter symbol min typ max unit test conditions/comments frequency range 0.01 3 ghz gain 17.5 19.5 db gain variation over temperature 0.01 db/c noise figure 1.1 1.6 db return loss input 15 db output 24 db output output power for 1 db compression p1db 19.0 21.0 dbm saturated output power p sat 22.5 dbm output third - order intercept ip3 33 dbm supply current i dq 65 80 ma adjust v gg1 to achieve i dq = 65 ma typical voltage v dd 2 5 6 v 3 gh z to 8 gh z frequency range t a = 25c, v dd = 5 v, and i dq = 65 ma, unless otherwise noted. table 2. parameter symbol min typ max unit test conditions/comments frequency range 3 8 ghz gain 15.5 18 db gain variation over temperature 0.01 db/c noise figure 1.4 1.9 db return loss input 12 db output 12 db output output power for 1 db compression p1db 17.5 20.5 dbm saturated output power p sat 22.5 dbm output third - order intercept ip3 31.5 dbm supply current i dq 65 80 ma adjust v gg1 to achieve i dq = 65 ma typical voltage v dd 2 5 6 v
hmc8410chips data sheet rev. 0 | page 4 of 16 8 gh z to 10 gh z frequency range t a = 25c, v dd = 5 v, and i dq = 65 ma, unless otherwise noted. table 3. parameter symbol min typ max unit test conditions/comments frequency range 8 10 ghz gain 13 16 db gain variation over temperature 0.01 db/c noise figure 1.7 2.2 db return loss input 6 db output 10 db output output power for 1 db compression p1db 17.5 19.5 dbm saturated output power p sat 21.5 dbm output third - order intercept ip3 33 dbm supply current i dq 65 80 ma adjust v gg1 to achieve i dq = 65 ma t ypical voltage v dd 2 5 6 v
data sheet hmc8410chip s rev. 0 | page 5 of 16 absolute maximum rat ings table 4. parameter 1 rating drain bias voltage (v d d ) 7 v dc radio frequency ( rf ) input power (rfin) 20 dbm conti nuous power dissipation ( p diss ), t = 85c (derate 13.23 mw/c above 85c) 1.2 w channel temperature 175c storage temperature range ?65c to +150c operating temperature range ?55 c to +85c esd sensitivity human body model (hbm) class 1b p assed 500 v 1 when referring to a single function of a multifunction pin in the parameters, only the portion of the pin name that is relevant to the specification is listed. for the full pin names of multifunction pins, refer to the pin configurat ion and function descriptions section. 2 see the ordering guide section for more information. stres ses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of th is specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. thermal resistance jc is the junction to case thermal resistance , channel to bottom of die . table 5 . thermal resistance package type j c unit c-2-3 75.57 c/w esd caution
hmc8410chips data sheet rev. 0 | page 6 of 16 pin configuration an d function descripti ons 2 rfout/v dd rfin/v gg 1 1 hmc8410chips top view (not to scale) 15093-002 figure 2 . pad configuration table 6 . pad function descriptions pin o. nemonic description 1 rfin/v gg 1 rf input (rfin). this pin is ac - coupled and matched to 50 ?. see figure 4 for the interface schematic. gate bias of the amplifier (v gg 1). this pin is ac - coupled and matched to 50 ?. see figure 4 for the interface schematic. 2 rfout/v dd rf output (rfout) . this pin is ac - coupled and matched to 50 ?. see figure 5 for the interface schematic. drain bias for amplifier (v dd ) . this pin is ac - coupled and matched to 50 ?. see figure 5 for the interface schematic. die bottom gnd ground. die bottom must be connected to rf/dc ground. interface schematics gnd 15093-003 figure 3 . gnd interface schematic rfin/v gg 1 15093-004 figure 4 . rfin/v gg 1 interface schematic rfout/v dd 15093-005 figure 5 . rfout/v dd interface schematic
data sheet hmc8410chips rev. 0 | page 7 of 16 typical performance characteristics 25 20 15 10 5 0 ?30 ?25 ?20 ?15 ?10 ?5 01234567891011 gain (db), return loss (db) frequency (ghz) s11 s21 s22 15093-006 figure 6. gain and return loss vs. frequency 0 ?2 ?4 ?6 ?8 ?10 ?20 ?18 ?16 ?14 ?12 01234567891011 input return loss (db) frequency (ghz) +85c +25c ?55c 15093-007 figure 7. input return loss vs. frequency for various temperatures 4.0 3.5 3.0 2.5 2.0 1.5 0 1.0 0.5 01234567891011 noise figure (db) frequency (ghz) +85c +25c ?55c 15093-008 figure 8. noise figure vs. frequency for various temperatures 22 20 18 16 14 12 8 10 01234567891011 gain (db) frequency (ghz) +85c +25c ?55c 15093-009 figure 9. gain vs. frequency for various temperatures 01234567891011 output return loss (db) frequency (ghz) +85c +25c ?55c 0 ?5 ?10 ?15 ?20 ?25 ?35 ?30 15093-010 figure 10. output return loss vs. fr equency for various temperatures 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 noise figure (db) frequency (ghz) +85c +25c ?55c 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15093-011 figure 11. noise figure vs. frequency for various temperatures, 10 mhz to 1 ghz
hmc8410chips data sheet rev. 0 | page 8 of 16 25 24 23 22 21 20 15 16 17 18 19 01234567891011 p1db (dbm) frequency (ghz) +85c +25c ?55c 15093-012 figure 12. p1db vs. frequency for various temperatures 25 24 23 22 21 20 15 16 17 18 19 01234567891011 p sat (dbm) frequency (ghz) +85c +25c ?55c 15093-013 figure 13. p sat vs. frequency for various temperatures 40 35 30 25 20 15 10 5 0 01234567891011 output ip3 (dbm) frequency (ghz) +85c +25c ?55c 15093-014 figure 14. output ip3 vs. frequency for various temperatures, output power (p out )/tone = 5 dbm 50 45 40 35 30 0 5 10 15 20 25 01234567891011 output ip2 (dbm) frequency (ghz) +85c +25c ?55c 15093-015 figure 15. output ip2 vs. frequency for various temperatures at p out /tone = 5 dbm 01234567891011 reverse isolation (db) frequency (ghz) +85c +25c ?55c 0 ?5 ?10 ?15 ?20 ?25 ?35 ?30 15093-016 figure 16. reverse isolation vs. frequency for various temperatures +85c +25c ?55c 40 35 30 25 20 15 10 5 0 01234567891011 output ip3 (dbm) frequency (ghz) 0dbm 5dbm 10dbm 15093-017 figure 17. output ip3 vs. frequency for various p out /tone
data sheet hmc8410chips rev. 0 | page 9 of 16 0 0.20.40.60.81.0 gain (db), p1db (dbm), p sat (dbm), output ip3 (dbm) frequency (ghz) gain p1db p sat output ip3 40 35 30 25 20 10 15 15093-018 figure 18. gain, p1db, p sat , and output ip3 vs. frequency 40 35 30 25 20 15 0 10 5 01234567891011 p1db (dbm), pae (%) frequency (ghz) p1db pae 15093-019 figure 19. p1db and power added efficiency (pae) vs. frequency 50 40 45 35 30 25 20 15 0 10 5 100 90 95 85 80 75 70 65 50 60 55 ?10 ?5 0 5 10 p out (dbm), gain (db), pae (%) input power (dbm) i dd (ma) p out gain pae i dd 15093-020 figure 20. p out , gain, pae, and supply current with rf applied (i dd ) vs. input power at 5 ghz 55 45 35 50 40 30 25 20 15 0 10 5 01234567891011 p sat (dbm), pae (%) frequency (ghz) p sat pae 15093-021 figure 21. p sat and pae vs. frequency 0.45 0.40 0.35 0.30 0.25 0 0.05 0.10 0.15 0.20 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 12 14 power dissipation (w) input power (dbm) 1ghz 3ghz 5ghz 7ghz 9ghz 15093-022 figure 22. power dissipation vs. input power for various frequencies, t a = 85c 22 20 18 16 14 12 8 10 01234567891011 gain (db) frequency (ghz) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 80ma 15093-023 figure 23. gain vs. frequency for various supply currents, v dd = 5 v
hmc8410chips data sheet rev. 0 | page 10 of 16 4.0 3.5 3.0 2.5 2.0 1.5 0 1.0 0.5 01234567891011 noise figure (db) frequency (ghz) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma 15093-024 figure 24. noise figure vs. frequency for various supply currents (i dq ), v dd = 5 v 25 20 15 0 10 5 01234567891011 p1db (dbm) frequency (ghz) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma 80ma 15093-025 figure 25. p1db vs. frequency for various supply currents (i dq ), v dd = 5 v 25 24 23 18 22 21 20 19 01234567891011 p sat (dbm) frequency (ghz) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma 80ma 15093-026 figure 26. p sat vs. frequency for various supply currents (i dq ), v dd = 5 v output ip3 (dbm) 40 35 30 25 20 15 10 5 0 01234567891011 frequency (ghz) 15093-027 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma figure 27. output ip3 vs. frequency for various supply currents (i dq ), p out /tone = 5 dbm, v dd = 5 v 22 20 18 16 14 12 8 10 01234567891011 gain (db) frequency (ghz) 3v 4v 5v 6v 7v 15093-028 figure 28. gain vs. frequency for various supply voltages, i dq = 65 ma 4.0 3.5 3.0 2.5 2.0 1.5 0 1.0 0.5 01234567891011 noise figure (db) frequency (ghz) 3v 4v 5v 6v 7v 15093-029 figure 29. noise figure vs. freque ncy for various supply voltages, i dq = 65 ma
data sheet hmc8410chips rev. 0 | page 11 of 16 25 23 21 19 17 15 11 13 01234567891011 p1db (dbm) frequency (ghz) 3v 4v 5v 6v 7v 15093-030 figure 30. p1db vs. frequency for various supply voltages, i dq = 65 ma 27 25 23 21 19 17 15 13 0246810 p sat (dbm) frequency (ghz) 3v 4v 5v 6v 7v 15093-031 figure 31. p sat vs. frequency for various supply voltages, i dq = 65 ma 40 35 30 25 20 15 0 10 5 01234567891011 output ip3 (dbm) frequency (ghz) 3v 4v 5v 6v 7v 15093-032 figure 32. output ip3 vs. frequency for various supply voltages, p out /tone = 5 dbm 90 80 70 60 50 40 30 20 10 0 i dd (ma) v gg 1 (v) ?0.90 ?0.85 ?0.80 ?0.75 ?0.70 ?0.65 ?0.60 ?0.55 ?0.50 ?0.45 15093-033 figure 33. supply current with rf applied (i dd ) vs. v gg 1, v dd = 5 v, representative of a typical device 120 80 100 60 40 20 0 ?10 ?5 0 5 15 10 i dd (ma) input power (dbm) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma 80ma 15093-034 figure 34. supply current with rf applied (i dd ) vs. input power for various supply currents (i dq ), v dd = 5 v 20 14 18 16 12 10 8 6 ?10 ?5 0 5 15 10 gain (db) input power (dbm) 5ma 15ma 25ma 35ma 45ma 65ma 70ma 75ma 80ma 15093-035 figure 35. gain vs. input power for various supply currents (i dq ) at 5 ghz, v dd = 5 v
hmc8410chips data sheet rev. 0 | page 12 of 16 theory of operation the hmc8410chips is a gaas, mmic, phemt , low noise wideband amplifier. the cascode amplifier uses a fundamental cell of two field effect transistors ( fets ) in series, source to drain. the b a sic schematic for the cascode cell is shown in figure 36 , which forms a low noise amplifier operating from 0.01 ghz to 10 ghz with excellent noise figure performance. rfout/v dd rfin/v gg 1 15093-036 figure 36 . basic schematic for the cascode cell the hmc8410chips has single - ended input and output ports whose impedances are nominally equal to 50 ? over the 0.01 ghz to 10 ghz frequency range. consequently, it can directly insert into a 50 ? system with no required impedance matching circuitry , w hich also means that multiple hmc8410chips amplifiers can be cascaded back to back without the need for external matching circuitry. the input and output impedances are sufficiently stable vs. variations in temperature and supply voltage so that no impedance matching compensat ion is required. t o achieve optimal performance from the hmc8410chips and prevent damage to the device , do not exceed the absolute maximum ratings.
data sheet hmc8410chips rev. 0 | page 13 of 16 applications information figure 39 shows the basic connections for operating the hmc8410chips . the data taken herein used wideband bias tees on the input and output ports to provide both ac coupling and the necessary supply voltages to the rfin/v gg 1 and rfout/v dd pins. a 5 v dc drain bias is supplied to the amplifier through the choke inductor connected to the rfout/v dd pin, and the ?2 v gate bias voltage is supplied to the rfin/v gg 1 pin through the choke inductor. the rf signal must be ac-coupled to prevent disrupting the dc bias applied to rfin/v gg 1 and rfout/v dd . the nonideal characteristics of ac coupling capacitors and choke inductors (for example, self resonance) can introduce performance trade-offs that must be considered when using a single application circuit across a very wide frequency range. recommended bias sequencing the recommended bias sequence during power-up is as follows: 1. connect to gnd. 2. set rfin/v gg 1 to ?2 v. 3. set rfout/v dd to 5 v. 4. increase rfin/v gg 1 to achieve a typical supply current (i dq ) = 65 ma. 5. apply the rf signal. the recommended bias sequence during power-down is as follows: 1. tur n of f t he rf sig na l. 2. decrease rfin/v gg 1 to ?2 v to achieve a typical i dq = 0 ma. 3. decrease rfout/v dd to 0 v. 4. increase rfin/v gg 1 to 0 v. the bias conditions previously listed (rfout/v dd = 5 v and i dq = 65 ma) are the recommended operating conditions to achieve optimum performance. the data used in this data sheet was taken with the recommended bias conditions. when using the hmc8410chips with different bias conditions, different performance than that shown in the typical performance characteristics section may result. figure 29, figure 30, and figure 31 show that increasing the voltage from 3 v to 7 v typically increases p1db and p sat at the expense of power consumption with minor degradation on noise figure (nf). mounting and bonding techniques for millimeterwave gaas mmics attach the die directly to the ground plane eutectically or with conductive epoxy (see the handling precautions section). to bring the radio frequency to and from the chip, implementing 50 transmission lines using a microstrip or coplanar waveguide on 0.127 mm (5 mil) thick alumina, thin film substrates is recom- mended (see figure 37). when using 0.254 mm (10 mil) thick alumina, it is recommended that the die be raised to ensure that the die and substrate surfaces are coplanar. raise the die 0.150 mm (6 mil) to ensure that the surface of the die is coplanar with the surface of the substrate. to accomplish this, attach the 0.102 mm (4 mil) thick die to a 0.150 mm (6 mil) thick, molybdenum (mo) heat spreader (moly tab), which can then be attached to the ground plane (see figure 37 and figure 38). rf ground plane 0.102mm (0.004") thick gaas mmic wire bond 0.127mm (0.005") thick alumina thin film substrate 0.076mm (0.003") 15093-037 figure 37. die without the moly tab 0.102mm (0.004") thick gaas mmic wire bond rf ground plane 0.254mm (0.010") thick alumina thin film substrate 0.076mm (0.003") 0.150mm (0.005") thick moly tab 15093-038 figure 38. die with the moly tab place microstrip substrates as close to the die as possible to minimize bond wire length. typical die to substrate spacing is 0.076 mm to 0.152 mm (3 mil to 6 mil).
hmc8410chips data sheet rev. 0 | page 14 of 16 handling precautions to avoid permanent damage, follow these storage, cleanliness, static sensitivity, transient, and general handling precautions: ? place all bare die in either waffle or gel - based esd protective containers and then seal the die in an esd protective bag for shipment. after the sealed esd protective bag is opened, store all die in a dry nitrogen environment. ? handle the chips in a clean environment. do not attempt to clean the chip using liquid cleaning systems. ? follow esd precautions to protect against esd strikes. ? while bias is applied, suppress instrument and bias supply transients. use shielded signal and bias cables to minimize induc tive pickup. ? handle the chip along the edges with a vacuum collet or with a sharp pair of bent tweezers. the surface of the chip may have fragile air bridges and must not be touched with a vacuum collet, tweezers, or fingers.
data sheet hmc8410chip s rev. 0 | page 15 of 16 application circuit rfin external bias tee v gg 1 rfout external bias tee v dd 1 2 15093-039 figure 39 . application circuit assembly diagram 50 transmission line 3mil nominal gap rfout/v dd rfin/v gg 1 15093-040 figure 40 . assembly diagram
hmc8410chips data sheet rev. 0 | page 16 of 16 outline dimensions 10-20-2016- a adi 2015 0.610 0.950 0.630 0.779 0.159 0.102 side view top view 1 2 0.162 0.165 0.162 0.186 0.248 0.099 0.078 figure 41 . 2 - pad bare die [chip] (c - 2 - 3 ) dimensions shown in millimeters ordering guide model 1 temperature range package description package option hmc8410chips ?55 c to +85c 2- pad bare die [chip] c-2-3 hmc8410chips -sx ?55 c to +85c 2- pad bare die [chip] c-2-3 1 the hmc8410chips and hmc8410chips - sx are rohs compliant parts. ? 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d15093 - 0 - 10/16(0)

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